Minutes 1-17-2008
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FDC Weekly Meeting
Date: January 17, 2008
Participants: Daniel, Brian, Simon, Roger, Chuck, Fernando, Bill, Mark
Next Meeting: January 24, 2008 @ 1:30 p.m.
Contents
- 1 Composite Wire Frames
- 2 Wire Winding
- 3 Composite Cathode Construction
- 4 Small-Scale Prototype
- 5 Package Gas Volume Definition
- 6 STB/HVTB Design
- 7 Cathode Daughter Boards
- 8 Cooling System
- 9 LV/HV System Design
- 10 Drawings
- 11 FDC Mini-Review
- 12 FDC Insertion and Cabling
- 13 Schedule Discussion
- 14 Work List
Composite Wire Frames
- The finishing touches on the 3 wire frames that will be sent to IUCF for winding are being made in the machine shop. Brian reported that the frames will be done this week. He is fully satisfied with the quality of the frames.
Wire Winding
- The PR is awaiting Allison's signature at the current time. After she signs this, everything will be turned over to the JLab procurement folks. When they have completed their review, they will make any necessary changes and then contact the procurement folks at IUCF. Updates will be provided to the group as soon as we know something on signing the wire winding contract.
Composite Cathode Construction
- Brian and Denny will begin work on Monday to construct our first composite cathode boards and composite cathode sandwich using the dummy cathode boards. Brian will employ available low-density Rohacell foam for the frame core that will not be the thickness of the final design, however this was not thought to be a major concern for what he is trying to do. Starting this work has been delayed because the aluminum tooling plate needed was being used in the shop for preparation of the composite wire frames. - We still do not have a clear idea how we can measure the flatness of our cathodes. Bill has been doing some research to find out what is possible (remember a non-contact technique is required). We would prefer to outsource this if possible instead of developing an expensive system here at JLab. It may also be the case that we might only need to measure the first few cathodes to be fully confident that we can make the planes within our flatness specifications. If this can be done, we would not have to measure each and every plane that we made.
Small-Scale Prototype
- Next week, Brian will mount the +/-75 deg cathode boards on their associated frames for the small-scale prototype. At the current time, we believe that we have solid knowledge of how the cathode resolution depends on the orientation of the strips relative to the wires. The bigger issue that we need to study is the performance of these cathode boards with 2-micron thick copper strips. All of the boards studied for the small-scale prototype to date have a 5-micron copper thickness. - Once the new boards are available, Simon will install them into the test chamber for evaluation. - Starting next week, Simon and Fernando will acquire a gallery of pulses from the chamber read out with the ASIC preamplifiers. This gallery will then be supplied to Gerard and Mitch for study.
Package Gas Volume Definition
- As discussed at our last meeting, we are working to redesign the FDC packages to be a single gas volume instead of 6 separate volumes. This was felt to be the right thing to do to ensure that the differential gas pressure across the cathodes was zero. Roger will look at the design of the cathodes and where we can include through-holes. These through-holes would then be matched with holes in the Rohacell backing layer. The only tricky issue is how to get the gas around our thin ground layers (that go between neighboring cathodes). Brian will look into this design and come up with a plan. Presently he believes that he can incorporate gas holes in the support frame, but he needs to look into this. As a result of this change, we will need to incorporate gas windows on the upstream and downstream end of each package. If we use this approach, it will simplify the gas connections to each package.
STB/HVTB Design
- Kim is nearly done with the design of the STB and HVTB boards. The full set of design drawings has been turned over to Fernando for review. When Fernando gives his blessing, Kim will need several days to complete the layout. She will then start the procurement process. We need to decide how many sets of boards we want to order. Kim will also place the orders for the components and connectors.
Cathode Daughter Boards
- Since our last regular meeting, Roger completed his preliminary layout for the cathode daughter boards. He then ordered parts to build several mechanical mockups. The mockups included a 1/32-in thick piece of G10 with a cut-out in the middle of it (this represents the cathode support skin). The back side of this piece of G10 included copper pads to which the rigid flex cable was soldered (these pads would be the cathode board itself). On the front side of this piece, the rigid flex cable was soldered to Roger's cathode daughter board and the preamp daughter board connector was attached. The flex cable was soldered to the back side of the daughter board using a solder re-flow technique. - The prototypes that were made up were passed around for discussion and the design looked very professional and stable. Roger will have to make some minor modifications to the cathode daughter board to allow room for the power cable connector (the same ERNI connectors that are being used on the wire frame boards).
Cooling System
- Bill gave an update on the cooling system. He has gotten a quote for the construction of the 530 copper brackets that attach from the preamp daughter cards to the cooling lines. The price was a bit steep at about $14k (or about $30 per bracket). He will look at his bracket design and see if he can modify the design to reduce the costs. - Bill has also been looking for a chiller system that will be compatible with our cooling power requirement and our desire to use Fluorinert as our cooling medium. He is not having much luck finding a cost effective system. He will continue to look. If we were planning on using water as our medium, there would be many reasonably priced chiller options, but we are all nervous about water given the ever-present possibility of leaks.
LV/HV System Design
- Earlier in the day, Fernando and DSC met with Joe Beaufait to discuss the design of the FDC high voltage and low voltage systems. We discussed the overall concepts and design philosophies of each system, including how ground will be handled. We reviewed the granularity in both systems and discussed the layout of the fusing system for the low voltage control. We will meet again with Joe in about 2 weeks to give him a chance to start thinking about these systems and come up with firmer plans and layouts. When we make a bit more progress on a preliminary layout, we will get the CDC folks involved to be sure that we have a system that will work for both chambers.
Drawings
- DSC has collected all of the available FDC subsystem design drawings and placed them on the FDC website. The URL is: http://www.jlab.org/Hall-D/detector/fdc/drawings.html. Folks should go through the drawings and let DSC know what drawings and/or categories are missing for a complete design set.
FDC Mini-Review
- The FDC mini-review on technology choice is scheduled for Feb. 1. The reviewers will be Howard Fenker (JLab) and Larry Weinstein (ODU). DSC has prepared a new version of the FDC Technical Design Report to reflect the current system design. This will be provided as part of the pre-briefing material. - The planned speakers for this review are Mark Ito (physics overview and needs), DSC (FDC design), Simon (FDC R&D, measurements, and algorithms), and David (GEANT3 simulations). There will be a planning meeting for the mini-review next Thursday where we will start to look at the slides for the different talks.
FDC Insertion and Cabling
- At the collaboration meeting there was talk that it may be preferable to have the FDC inserted from the upstream end of the solenoid rather than the downstream end. This would also mean that all of the readout and power cables would come out of the upstream end of the magnet. This may be important to remove the problematic FDC cable mass that gives rise to lots of photon conversions that lead to a coverage hole between the BCAL and FCAL. More simulation work and discussion is needed before a final decision can be made on this issue. However, we did have some preliminary discussion on the design work that would be required for this scenario.
Schedule Discussion
- During the collaboration meeting Elke raised the idea of giving Mitch more time to work on the next version of the ASICs. The original plan was to give Mitch feedback on the current ASIC version (called GAS-1) by March so that he could complete a design and submit it by April. The next submission deadline for the chips would be June, which means that we would not have any real quantity of amplifiers before December. - This issue is relevant for testing of the full-scale FDC prototype. How many amplifier boards will we have? Will we have sufficient numbers to carry out a full test plan of the FDC performance to finalize the system design? If we have sufficient numbers of ASICs, we still have very few ADCs and TDCs. If we do not have the necessary amplifiers and readout electronics, we may decide to scale back what we will build for the prototype. It may be most sensible (and cost effective) to build a half package prototype. More discussions will be forthcoming on this front.
Work List
- The FDC short-term work list has been posted on the FDC web site (see http://www.jlab.org/Hall-D/detector/fdc/). This is continually being updated and DSC welcomes any feedback or comments from the group.
Minutes prepared by Daniel. Send any comments or corrections along.