Difference between revisions of "Topics for discussion"
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− | + | '''<big>1. Overview main features of the GlueX subdetectors which are planned be integrated into the Level-1 trigger:</big>''' | |
− | + | * Tagger microscope counters | |
+ | * Start Counter | ||
+ | * FCAL | ||
+ | * BCAL | ||
+ | * TOF | ||
+ | <u>Discuss</u>: | ||
+ | :# feasibility of usage and their role in the Level-1 algorithm, | ||
+ | :# rates induced by electromagnetic and hadronic interactions, | ||
+ | :# signal responses: pulse shapes and signal propagation timing | ||
+ | :#: (feedback is needed from the prototypes test: BCAL, TOF) | ||
+ | :# signal thresholds, | ||
+ | :# cabling. | ||
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− | + | '''<big>2. Overview the trigger algorithm.</big>''' | |
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+ | '''<big>3. Trigger types</big>''' | ||
+ | *: global self-triggered types (physics, cosmics, random, calibration ...), | ||
+ | *: external triggers (calibration), and sub-detector standalone triggers | ||
+ | *:<u>Feedback is needed from sub-detector and calibration groups.</u> | ||
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+ | '''<big> 4. Overview trigger electronics</big>: | ||
+ | * <u>Performance of board prototypes:</u> | ||
+ | *# fADC250 (modes, FPGA resources...) | ||
+ | *# Signal Distribution (SD) | ||
+ | *# Trigger Interface (TI) | ||
+ | *# Crate Trigger Processor (CTP) | ||
+ | *# Results from the 2 crates test stand | ||
− | + | * <u>Specifications (design) of the board prototypes:</u> | |
+ | *# Sub-System processor (SSP) | ||
+ | *# Trigger Distribution (TD) | ||
+ | *# Trigger Supervisor (TS) | ||
+ | *# Global Trigger Processor (GTP) | ||
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− | + | '''<big>5. Monitoring of the hardware performance </big> | |
− | + | :# Online monitors ( scalers ) | |
− | + | :# Algorithm/hardware tests using inputs from MC simulation | |
− | + | ||
− | + | ||
− | + | '''<big>6. Trigger electronics in 12 GeV HALL-B project </big> | |
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Latest revision as of 08:58, 3 June 2009
1. Overview main features of the GlueX subdetectors which are planned be integrated into the Level-1 trigger:
- Tagger microscope counters
- Start Counter
- FCAL
- BCAL
- TOF
Discuss:
- feasibility of usage and their role in the Level-1 algorithm,
- rates induced by electromagnetic and hadronic interactions,
- signal responses: pulse shapes and signal propagation timing
- (feedback is needed from the prototypes test: BCAL, TOF)
- signal thresholds,
- cabling.
2. Overview the trigger algorithm.
3. Trigger types
- global self-triggered types (physics, cosmics, random, calibration ...),
- external triggers (calibration), and sub-detector standalone triggers
- Feedback is needed from sub-detector and calibration groups.
4. Overview trigger electronics:
- Performance of board prototypes:
- fADC250 (modes, FPGA resources...)
- Signal Distribution (SD)
- Trigger Interface (TI)
- Crate Trigger Processor (CTP)
- Results from the 2 crates test stand
- Specifications (design) of the board prototypes:
- Sub-System processor (SSP)
- Trigger Distribution (TD)
- Trigger Supervisor (TS)
- Global Trigger Processor (GTP)
5. Monitoring of the hardware performance
- Online monitors ( scalers )
- Algorithm/hardware tests using inputs from MC simulation
6. Trigger electronics in 12 GeV HALL-B project